000			01374nam a22002417a 4500
999			_c16171 _d16171
005			20201028202741.0
008			140202b ck ||||| |||| 00| 0 spa d
020			_a0070464790
040			_aCO-NeUS _bspa _erda
041			_aspa
100	1		_aNavabi, Zainalabedin _970058 _eautor
245	1	0	_aVHDL : analysis and modeling of digital systems / _cZainalabedin Navabi
250			_aSegunda edición
264	1		_aSingapur : _bMcGraw Hill, _c1998
300			_axiii, 632 páginas ; _c23 cm.
336			_2rdacontent _atexto
337			_2rdamedia _ano mediado
338			_2rdacarrier _avolumen
505	0	0	_aHaedware Desing Environments -- VHDL Background -- Desing Methodology based on VHDL -- Basic Concepts in
505	0	0	_aVHDL -- Structural Specification of Hardware -- Desing Organization and Parameterization -- Utilities for
505	0	0	_aHigh-Level Descriptions -- Dataflow Descriptions in VHDL -- Behavioral Description of Hardware -- CPU Modeling
505	0	0	_afor Discrete Design -- Interface Desingn and Modeling -- VHDL as a Modeling Language -- Appendix A : Basic
505	0	0	_aUtilities Package -- Appendix B : Examples of VHDL Synthesis Subset -- Appendix C : Standard MSI 74LS Parts --
505	0	0	_aAppendix D : Parwan VHDL Descriptions -- Appendix E : VHDL Language Grammar -- Appendix F : VHDL Standard
505	0	0	_aPackage -- Appendix G : Std_LOGIC 1164 Package --
082	0	4	_a621.392 / _221 _bN316v
650	1	4	_aVhdl (lenguaje dedescripcion del hadware de computadores) _9134473
650	1	4	_aCircuitos integrados digitales _xdiseño y construccion _9103230
942			_2ddc _cCG _h621.392 / _kN316v